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| NL17SZ74 Single D Flip Flop The NL17SZ74 is a high performance, full function Edge triggered D Flip Flop, with all the features of a standard logic device such as the 74LCX74. * * * * * * * Extremely High Speed: tPD 2.6 ns (typical) at VCC = 5 V Designed for 1.65 V to 5.5 V VCC Operation 5 V Tolerant Inputs - Interface Capability with 5 V TTL Logic LVTTL Compatible LVCMOS Compatible 24 mA Balanced Output Sink and Source Capability Near Zero Static Supply Current (10 A) Substantially Reduces System Power Requirements Replacement for NC7SZ74 D 2 PR 7 5 3 6 CLR VCC = 8, GND = 4 Q Q http://onsemi.com * * Tiny Ultra Small Package Only 2.1 X 3.0 mm * High ESD Ratings: 2000 V Human Body Model * High ESD Ratings: 200 V Machine Model Chip Complexity: FET = 64 CP 1 Figure 1. Logic Diagram TRUTH TABLE Inputs PR L H L H H H H h L l NC X CLR H L L H H H CP X X X D X X X h l X Outputs Q H L H H L NC Q L H H L H NC Operating Mode Asynchronous Set Asynchronous Clear Undetermined Load and Read Register Hold MH D US8 CASE 493 US SUFFIX MARKING DIAGRAM = High Voltage Level = High Voltage Level One Setup Time Prior to the Low-to-High Clock Transition = Low Voltage Level = Low Voltage Level One Setup Time Prior to the Low-to-High Clock Transition = No Change = High or Low Voltage Level and Transitions are Acceptable = Low-to-High Transition = Not a Low-to-High Transition MH = Specific Device Code D = Date Code For ICC reasons, DO NOT FLOAT Inputs PINOUT CP D Q GND 1 2 3 4 8 7 6 5 VCC PR CLR Q ORDERING INFORMATION Device NL17SZ74US Package US8 Shipping 3000/Tape & Reel (c) Semiconductor Components Industries, LLC, 2002 1 May, 2002 - Rev. 2 Publication Order Number: NL17SZ74/D NL17SZ74 MAXIMUM RATINGS Symbol VCC VI VO IIK IOK IO ICC IGND TSTG TL TJ qJA PD MSL FR VESD DC Supply Voltage DC Input Voltage DC Output Voltage - Output in High or Low State (Note 1) DC Input Diode Current DC Output Diode Current DC Output Sink Current DC Supply Current Per Supply Pin DC Ground Current Per Ground Pin Storage Temperature Range Lead Temperature, 1 mm from Case for 10 Seconds Junction Temperature Under Bias Thermal Resistance (Note 2) Power Dissipation in Still Air at 85C Moisture Sensitivity Flammability Rating ESD Withstand Voltage Oxygen Index: 28 to 34 Human Body Model (Note 3) Machine Model (Note 4) Charged Device Model (Note 5) VI < GND VO < GND Parameter Value -0.5 to +7.0 -0.5 to +7.0 -0.5 to VCC +0.5 -50 -50 50 100 100 -65 to +150 260 +150 250 250 Level 1 UL 94 V-0 @ 0.125 in >2000 >200 N/A V Unit V V V mA mA mA mA mA C C C C/W mW Maximum Ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute maximum-rated conditions is not implied. Functional operation should be restricted to the Recommended Operating Conditions. 1. IO absolute maximum rating must be observed. 2. Measured with minimum pad spacing on an FR4 board, using 10 mm X 1 inch, 2 ounce copper trace with no air flow. 3. Tested to EIA/JESD22-A114-A. 4. Tested to EIA/JESD22-A115-A. 5. Tested to JESD22-C101-A. RECOMMENDED OPERATING CONDITIONS Symbol VCC VI VO TA Dt/V Supply Voltage Input Voltage Output Voltage Operating Free-Air Temperature Input Transition Rise or Fall Rate VCC = 2.5 V 0.2 V VCC = 3.0 V 0.3 V VCC = 5.0 V 0.5 V Parameter Operating Data Retention Only (Note 6) (HIGH or LOW State) Min 1.65 1.5 0 0 -40 0 0 0 Max 5.5 5.5 5.5 VCC +85 20 10 5.0 Unit V V V C ns/V 6. Unused inputs may not be left open. All inputs must be tied to a high-logic voltage level or a low-logic input voltage level. http://onsemi.com 2 NL17SZ74 DC ELECTRICAL CHARACTERISTICS VCC Symbol VIH Parameter High-Level Input Voltage Condition (V) 1.65 2.3 to 5.5 VIL Low-Level Input Voltage 1.65 2.3 to 5.5 VOH High Level Output High-Level Out ut Voltage VIN = VIL or VIL IOH = 100 mA IOH = -3 mA 3 IOH = -8 mA 8 IOH = -12 mA 12 IOH = -16 mA 16 IOH = -24 mA 24 IOH = -32 mA IOL = 100 mA IOL = 3 mA IOL = 8 mA IOL = 12 mA IOL = 16 mA IOL = 24 mA IOL = 32 mA VIN = VCC or GND 5.5V or VIN = GND VIN = VCC or GND 1.65 to 5.5 1.65 2.3 2.7 3.0 3.0 4.5 1.65 to 5.5 1.65 2.3 2.7 3.0 3.0 4.5 5.5 0 5.5 VCC - 0.1 1.29 1.9 2.2 2.4 2.3 3.8 VCC 1.52 2.1 2.4 2.7 2.5 4.0 0.008 0.10 0.12 0.15 0.19 0.30 0.30 0.1 0.24 0.3 0.4 0.4 0.55 0.55 $0.1 1.0 1.0 Min 0.75 VCC 0.7 VCC 0.25 VCC 0.3 VCC VCC - 0.1 1.29 1.9 2.2 2.4 2.3 3.8 0.1 0.24 0.3 0.4 0.4 0.55 0.55 $1.0 10 10 TA = 25_C Typ Max *40_C v TA v 85_C Min 0.75 VCC 0.7 VCC 0.25 VCC 0.3 VCC V V Max Unit V VOL Low Level Out ut Low-Level Output Voltage VIN = VIH V IIN IOFF ICC Input Leakage Current Power off Input Leakage Current Quiescent Supply Current mA mA mA http://onsemi.com 3 III I I I I I I II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II I III I I I I I I II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II IIII II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II IIII II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II IIII II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II IIII II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II IIII II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II IIII II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II IIII II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II IIII II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II IIII II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II IIII II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II IIII II I III I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II IIII II IIII II II I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II IIII II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II IIII II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II IIII II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II IIII II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II IIII II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II IIII II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II IIII II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II IIII II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II IIII II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II IIII II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II IIII II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II IIII II I III I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II IIII II IIII II II I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II IIII IIII II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II IIII II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II IIII II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II IIII II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II IIII II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II IIII II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II IIII II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II IIII II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II IIII II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II IIII II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II IIII II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II IIII II I III I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II IIII II II I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II IIII III II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II IIII II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II IIII II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II IIII II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II IIII II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II IIII II I IIIII IIIIIIIIIIIIIIIIIIIIIIIIII II II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II IIII II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II IIII II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II IIII II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II IIII II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II IIII II I III I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II IIII II IIII II II I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II IIII I II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II IIII II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II IIII II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II IIII II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II IIII II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II IIII II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III IIIIIIIIIIIIIIIIIIIIIIIIII I II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II IIII II I III I I I I I I II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II IIII II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II IIII II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II IIII II I III I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I II IIII II II I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II IIII I IIII II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II IIII II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II IIII II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIII II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIII IIIIIIIIIIIIIIIIIIII IIII II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I I III II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII 7. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC/2 (per flip-flop). CPD is used to determine the no-load dynamic power consumption; PD = CPD VCC2 fin + ICC VCC. AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0 ns) Symbol tPLH, tPHL tPLH, tPHL fMAX tREC tW tH tS Recover Time PR CLR t CP PR; to (Waveform 3) Pulse Width, CP, CLR CP CLR, PR (Waveform 3) Hold Time, D t CP to (Waveform 1) Setup Time, D t CP to (Waveform 1) Propagation Delay, PR or CLR t Q to or Q (Waveform 2) Propagation Delay, CP t Q or Q to (Waveform 1) Maximum Clock Frequency F (50% Duty Cycle) (Waveform 1) Parameter 5.0 0.5 3.3 0.3 5.0 0.5 3.3 0.3 2.5 0.2 1.8 0.15 5.0 0.5 3.3 0.3 5.0 0.5 3.3 0.3 2.5 0.2 1.8 0.15 5.0 0.5 3.3 0.3 5.0 0.5 3.3 0.3 2.5 0.2 1.8 0.15 5.0 0.5 3.3 0.3 5.0 0.5 3.3 0.3 2.5 0.2 1.8 0.15 5.0 0.5 3.3 0.3 5.0 0.5 3.3 0.3 2.5 0.2 1.8 0.15 5.0 0.5 3.3 0.3 5.0 0.5 3.3 0.3 2.5 0.2 1.8 0.15 5.0 0.5 3.3 0.3 5.0 0.5 3.3 0.3 2.5 0.2 1.8 0.15 VCC (V) CL = 50 pF, RD = 500 W S1 = O W, Open CL = 15 pF RD = 1 MW S1 = Open CL = 50 pF, RD = 500 W S1 = O W, Open CL = 15 pF RD = 1 MW S1 = Open CL = 50 pF, RD = 500 W S1 = O W, Open CL = 15 pF RD = 1 MW S1 = Open CL = 50 pF, RD = 500 W S1 = O W, Open CL = 15 pF RD = 1 MW S1 = Open CL = 50 pF, RD = 500 W S1 = O W, Open CL = 15 pF RD = 1 MW S1 = Open CL = 50 pF, RD = 500 W S1 = O W, Open CL = 15 pF RD = 1 MW S1 = Open CL = 50 pF, RD = 500 W S1 = O W, Open CL = 15 pF RD = 1 MW S1 = Open Test Conditions http://onsemi.com NL17SZ74 4 Min 200 175 250 200 150 3.0 3.0 3.0 3.0 4.5 8.0 2.0 3.0 2.0 3.0 4.0 6.0 0.5 0.5 0.5 0.5 0.5 0.5 1.5 2.0 1.5 2.0 3.5 6.5 1.0 1.0 0.8 1.0 1.5 2.5 1.0 1.0 0.8 1.0 1.5 2.5 75 TA = 25C Typ 2.6 3.4 2.2 2.8 3.8 6.5 2.6 3.4 2.2 2.8 3.8 6.5 12.5 Max 5.0 7.0 5.0IIII5.5 0.8 6.5 9.0 5.0 7.0 4.5 6.5 7.5IIII8.0 1.5 14 TA = -40 to 85C Min 200 175 250 200 150 3.0 3.0 3.0 3.0 4.5 8.0 2.0 3.0 2.0 3.0 4.0 6.0 0.5 0.5 0.5 0.5 0.5 0.5 1.5 2.0 1.5 2.0 3.5 6.5 1.0 1.0 1.0 1.5 2.5 1.0 1.0 0.8 1.0 2.5 75 14.5 Max 5.5 7.5 7.0 9.5 5.5 7.5 5.0 7.0 13 MHz MHz Unit ns ns ns ns ns NL17SZ74 CAPACITANCE (Note 8) Symbol CIN COUT CPD Parameter Input Capacitance Output Capacitance Power Dissipation Capacitance (Note 9) Frequency = 10 MHz VCC = 5.5 V VCC = 5.5 V VCC = 3.3 V VCC = 5.0 V Condition Typical 7.0 7.0 16 21 Unit pF pF pF 8. TA = +25C, f = 1 MHz 9. CPD is defined as the value of the internal equivalent capacitance which is derived from dynamic operating current consumption (I CCD) at no output loading and operating at 50% duty cycle. (See Figure 2) C PD is related to ICCD dynamic operating current by the expression: ICCD = CPD VCC fin + ICC(static). http://onsemi.com 5 NL17SZ74 Vcc D 50% 0V ts CP 50% 0V fmax tPLH, tPHL VOH Q, Q 50% VOL th tw Vcc WAVEFORM 1 - PROPAGATION DELAYS, SETUP AND HOLD TIMES tR = tF = 3.0 ns, 10% to 90%; f = 1 MHz; tW = 500 ns Vcc PR 50% 0V Vcc CLR 50% 0V tPLH Q 50% tPHL 50% VOL tPLH Q tPHL WAVEFORM 2 - PROPAGATION DELAYS tR = tF = 3.0 ns, 10% to 90%; f = 1 MHz; tW = 500 ns tw PR, CLR 50% 0V trec CP 50% Vcc tw 0V WAVEFORM 3 - RECOVERY TIME tR = tF = 3.0 ns from 10% to 90%; f = 1 MHz; tw = 500 ns Output Reg: VOL 0.8 V, VOH 2.0 V Vcc 50% 50% VOH Figure 2. AC Waveforms http://onsemi.com 6 NL17SZ74 VCC PULSE GENERATOR RT DUT CL RL Figure 3. Test Circuit DEVICE ORDERING INFORMATION Device Nomenclature Device Order Number NL17SZ74US Logic Circuit Indicator NL No. of Gates per Package 1 Temp Range Identifier 7 Device Function 74 Package Suffix US Package Type US8 Tape and Reel Size 178 mm, 3000 Unit Technology SZ http://onsemi.com 7 NL17SZ74 CAVITY TAPE TOP TAPE TAPE TRAILER (Connected to Reel Hub) NO COMPONENTS 160 mm MIN COMPONENTS DIRECTION OF FEED TAPE LEADER NO COMPONENTS 400 mm MIN Figure 4. Tape Ends for Finished Goods TAPE DIMENSIONS mm 2.00 4.00 4.00 1.50 TYP 1.75 0.30 8.00 + 0.10 - 3.50 $ 0.25 1 1.00 0.25 TYP DIRECTION OF FEED Figure 5. US8 Reel Configuration/Orientation http://onsemi.com 8 NL17SZ74 t MAX 1.5 mm MIN (0.06 in) 20.2 mm MIN (0.795 in) 13.0 mm $0.2 mm (0.512 in $0.008 in) A 50 mm MIN (1.969 in) FULL RADIUS G Figure 6. Reel Dimensions REEL DIMENSIONS Tape Size 8 mm T and R Suffix US A Max 178 mm (7 in) G 8.4 mm, + 1.5 mm, -0.0 (0.33 in + 0.059 in, -0.00) t Max 14.4 mm (0.56 in) DIRECTION OF FEED BARCODE LABEL POCKET HOLE Figure 7. Reel Winding Direction http://onsemi.com 9 NL17SZ74 PACKAGE DIMENSIONS US8 US SUFFIX CASE 493-01 ISSUE O -X- A 8 5 -Y- J DETAIL E B L NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETERS 3. DIMENSION A" DOES NOT INCLUDE MOLD FLASH, PROTRUSION OR GATE BURR. MOLD FLASH. PROTRUSION AND GATE BURR SHALL NOT EXCEED 0.140 MM (0.0055") PER SIDE. 4. DIMENSION B" DOES NOT INCLUDE INTER-LEAD FLASH OR PROTRUSION. INTER-LEAD FLASH AND PROTRUSION SHALL NOT E3XCEED 0.140 (0.0055") PER SIDE. 5. LEAD FINISH IS SOLDER PLATING WITH THICKNESS OF 0.0076-0. 0203 MM. (300-800 mINCH). 6. ALL TOLERANCE UNLESS OTHERWISE SPECIFIED 0.0508 (0.0002"). MILLIMETERS MIN MAX 1.90 2.10 2.20 2.40 0.60 0.90 0.17 0.25 0.20 0.35 0.50 BSC 0.40 REF 0.10 0.18 0.00 0.10 3.00 3.20 0_ 6_ 5_ 10 _ 0.28 0.44 0.23 0.33 0.37 0.47 0.60 0.80 0.12 BSC INCHES MIN MAX 0.075 0.083 0.087 0.094 0.024 0.035 0.007 0.010 0.008 0.014 0.020 BSC 0.016 REF 0.004 0.007 0.000 0.004 0.118 0.126 0_ 6_ 5_ 10 _ 0.011 0.017 0.009 0.013 0.015 0.019 0.024 0.031 0.005 BSC 1 4 R S U C DIM A B C D F G H J K L M N P R S U V P G -T- SEATING PLANE D 0.10 (0.004) K M 0.10 (0.004) T N TXY V H R 0.10 TYP M F DETAIL E 3.8 1.8 TYP 0.5 TYP http://onsemi.com 10 EEE EEE EEE EEE EEE EEE EEE EEE 1.0 EEE EEE EEE EEE EEE EEE EEE EEE 0.3 TYP (mm) NL17SZ74 Notes http://onsemi.com 11 NL17SZ74 ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. PUBLICATION ORDERING INFORMATION Literature Fulfillment: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: ONlit@hibbertco.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada JAPAN: ON Semiconductor, Japan Customer Focus Center 4-32-1 Nishi-Gotanda, Shinagawa-ku, Tokyo, Japan 141-0031 Phone: 81-3-5740-2700 Email: r14525@onsemi.com ON Semiconductor Website: http://onsemi.com For additional information, please contact your local Sales Representative. http://onsemi.com 12 NL17SZ74/D |
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